You are given two circuits as shown in Fig. 14.46, which consist of NAND gates.

In both the given circuits, A and B are the inputs and Y is the output.

(a) The output of the left NAND gate will be $\overline{A \cdot B}$, as shown in the following figure.

Hence, the output of the combination of the two NAND gates is given as:

$Y=\overline{(\overline{A \cdot B}) \cdot(\overline{A \cdot B})}=\overline{\overline{A B}}+\overline{\overline{A B}}=A B$

Hence, this circuit functions as an AND gate.

(b) $\bar{A}$ is the output of the upper left of the NAND gate and $\bar{B}$ is the output of the lower half of the NAND gate, as shown in the following figure.

Hence, the output of the combination of the NAND gates will be given as:

$Y=\bar{A} \cdot \bar{B}=\overline{\bar{A}}+\overline{\bar{B}}=A+B$

Hence, this circuit functions as an OR gate.